We recommend direct verification against the technical datasheets published on manufacturers’ official websites. Focus on three key items: the basis for cleanliness class testing, XYθ repeat positioning accuracy, and cycle time for a single edge-searching operation. Parameter definitions shall follow official documentation. Product literature of ZYSEMI wafer aligners (including LXYR-8IN-01 and SU1120) is available on the official website (www.dgsmartwin.com), or contact ZYSEMI for further consultation.

The price difference mainly stem from cleanliness class, accuracy level, the range of compatible wafer types and non-standard customization requirements. The price span is wide, so it is not feasible to provide a single figure. A more practical approach is to compile a requirement list covering your wafer types, chamber space and cycle-time specifications first, then send inquiries to 2 to 3 manufacturers simultaneously. Only in this way can the obtained quotations be comparable. Attention should be paid not merely to the purchase price, but also to spare part unit prices and replacement cycles.

It depends on application scenarios. For standard 8/12-inch routing working conditions, domestic pre-aligners have achieved relatively mature adaptability. When handling special incoming wafer types, non-chamber-standard layout, or stringent cycle-time/particle specifications, the feasibility of substitution mainly hinges on whether the supplier possesses in-house R&D capability covering both complete machine motion control and vision algorithm fundamentals. Where the edge-search vision unit, drive, motor and controller are developed within one unified technical system, non-standard adaptation, fault troubleshooting and after-maintenance response will be faster. It is recommended to conduct evaluation item by item following the four verification criteria mentioned above before making a final decision.

 Yes. It must be confirmed three points during integration: whether the communication interface protocol is supported, whether the mechanical interface is matched with installation space, and whether the drive and motor can be provided by the same manufacturer. When both are provided by a single manufacturer, the responsibility boundary for joint commissioning becomes clearer.

The cleanliness class requirements are determined by process type (front-end wafer fabrication/back-end packaging and test), whether the equipment is installed inside a chamber or operated under ambient environments, and the baselines cleanliness class of the workshop. The back-end packaging production lines are generally less than front-end for micro-particles sensitivity. Many 8-inch front-end applications adopt ISO 2/4, while the ISO Class1 belongs to the ultra-high class with substantial costs. The specific cleanliness class should be confirmed according to workshop standards, particle control specifications and process nodes.

We recommend to compare the wafer aligner manufacturers according to four aspects. First is the basis of cleanliness class, including the inspection standard and which models covered by the reports. The second is about two parameters: the XYθ repeated positioning accuracy and cycle time for a single edge-searching operation. Third, whether the underlying components are self-developed or outsourced, and the long-term availability of the spare parts. The fourth is the actual operating records of the similar equipment on other production lines. 

Before the wafer is transferred to the process position, its center position and notch orientation must be confirmed. The aligners captured the wafer edge or notch area via camera. The algorithm identifies the notch position, calculates the wafer center and current angular deviations. Then the XYθ three-axis system completes compensation and rotational correction. The adaptability of the recognition algorithm to different wafer types determines the success rate of one-pass edge searching.